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All other pins (Note 1) . . . . . . . . . 0.5 V to +7.0 V
VCC for± 10% devices. . . . . . . . . . . . +4.5 V to +5.5 V
Output Short Circuit Current (Note 3) . . . . . . 200 mA
Note: Operating ranges define those limits between which
Notes:
the functionality of the device is guaranteed.
1. Minimum DC voltage on input or I/O pins is 0.5 V. During
voltage transitions, input or I/O pins may overshoot VSS
to 2.0 V for periods of up to 20 ns. See Figure 6.
Maximum DC voltage on input or I/O pins is VCC +0.5 V.
During voltage transitions, input or I/O pins may overshoot
to VCC +2.0 V for periods up to 20 ns. See Figure 7.
2. Minimum DC input voltage on pins A9, OE#, and RESET#
is 0.5 V. During voltage transitions, A9, OE#, and
RESET# may overshoot VSS to 2.0 V for periods of up
to 20 ns. See Figure 6. Maximum DC input voltage on pin
A9 is +12.5 V which may overshoot to +13.5 V for periods
up to 20 ns.
3. No more than one output may be shorted to ground at a
time. Duration of the short circuit should not be greater
than one second.
Note: Stresses above those listed under Absolute Maximum
Ratings may cause permanent damage to the device. This
is a stress rating only; functional operation of the device at
these or any other conditions above those indicated in the op-
erational sections of this data sheet is not implied. Exposure
of the device to absolute maximum rating conditions for ex-
tended periods may affect device reliability.
20 ns 20 ns
20 ns
+0.8 V
VCC
+2.0 V
0.5 V
VCC
+0.5 V
2.0 V
2.0 V
20 ns
20 ns 20 ns
21526B-11
21526B-10
Figure 6. Maximum Negative Overshoot
Figure 7. Maximum Positive Overshoot
Waveform
Waveform
Am29F200B 21
DC CHARACTERISTICS
TTL/NMOS Compatible
Parameter
Symbol Parameter Description Test Conditions Min Max Unit
ILI Input Load Current VIN = VSS to VCC, VCC = VCC Max ±1.0 µA
A9, OE#, RESET# Input Load VCC = VCC Max,
ILIT 50 µA
Current A9, OE#, RESET# = 12.5 V
ILO Output Leakage Current VOUT = VSS to VCC, VCC = VCC Max ±1.0 µA
Byte 40
ICC1 VCC Active Read Current (Notes 1, 2) CE# = VIL, OE# = VIH mA
Word 50
VCC Active Program/Erase Current
ICC2 CE# = VIL, OE# = VIH 60 mA
(Notes 2, 3, 4)
ICC3 VCC Standby Current (Note 2) VCC = VCC Max, CE# = VIH, OE# = VIH 1.0 mA
VIL Input Low Voltage 0.5 0.8 V
VIH Input High Voltage 2.0 VCC + 0.5 V
Voltage for Autoselect and Temporary
VID VCC = 5.0 V 11.5 12.5 V
Sector Unprotect
VOL Output Low Voltage IOL = 5.8 mA, VCC = VCC Min 0.45 V
VOH Output High Voltage IOH = 2.5 mA, VCC = VCC Min 2.4 V
VLKO Low VCC Lock-Out Voltage 3.2 4.2 V
Notes:
1. The ICC current is typically less than 2 mA/MHz, with OE# at VIH.
2. Maximum ICC specifications are tested with VCC = VCCmax.
3. ICC active while Embedded Program or Erase Algorithm is in progress.
4. Not 100% tested.
22 Am29F200B
DC CHARACTERISTICS (Continued)
CMOS Compatible
Parameter
Symbol Parameter Description Test Conditions Min Typ Max Unit
ILI Input Load Current VIN = VSS to VCC, VCC = VCC Max ±1.0 µA
A9, OE#, RESET# Input VCC = VCC Max;
ILIT 50 µA
Load Current A9, OE#, RESET# = 12.5 V
ILO Output Leakage Current VOUT = VSS to VCC, VCC = VCC Max ±1.0 µA
Byte 20 40
VCC Active Read Current
ICC1 CE# = VIL, OE# = VIH mA
(Notes 1, 2)
Word 28 50
VCC Active Program/Erase
ICC2 CE# = VIL, OE# = VIH 30 50 mA
Current (Notes 2, 3, 4)
VCC Standby Current
ICC3 CE# = VCC ± 0.5 V, OE# = VIH 15 µA
Note (Note 5)
VIL Input Low Voltage 0.5 0.8 V
VIH Input High Voltage 0.7 x VCC VCC + 0.3 V
Voltage for Autoselect and
VID VCC = 5.0 V 11.5 12.5 V
Temporary Sector Unprotect
VOL Output Low Voltage IOL = 5.8 mA, VCC = VCC Min 0.45 V
VOH1 IOH = 2.5 mA, VCC = VCC Min 0.85 VCC V
Output Low Voltage
VOH2 IOH = 100 µA, VCC = VCC Min VCC 0.4 V
VLKO Low VCC Lock-Out Voltage 3.2 4.2 V
Notes:
1. The ICC current listed is typically less than 2 mA/MHz, with OE# at VIH.
2. Maximum ICC specifications are tested with VCC = VCCmax.
3. ICC active while Embedded Program or Erase Algorithm is in progress.
4. Not 100% tested.
5. ICC3 for extended temperature is 20 µA max (>+85°C).
Am29F200B 23
TEST CONDITIONS
Table 6. Test Specifications
5.0
-45, -50, All
Test Condition -55 others Unit
2.7 k&!
Output Load 1 TTL gate
Device
Under
Output Load Capacitance, CL
Test
30 100 pF
(including jig capacitance)
CL 6.2 k&!
Input Rise and Fall Times 5 20 ns
Input Pulse Levels 0.0 3.0 0.45 2.4 V
Input timing measurement
1.5 0.8, 2.0 V
reference levels
Note:
Output timing measurement
Diodes are IN3064 or equivalents.
1.5 0.8, 2.0 V
reference levels
21526B-12
Figure 8. Test Setup
KEY TO SWITCHING WAVEFORMS
WAVEFORM INPUTS OUTPUTS
Steady
Changing from H to L
Changing from L to H
Don t Care, Any Change Permitted Changing, State Unknown
Does Not Apply Center Line is High Impedance State (High Z)
KS000010-PAL
24 Am29F200B
AC CHARACTERISTICS
Read Operations
Parameter Speed Options
JEDEC Std Description Test Setup -45 -50 -55 -70 -90 -120 Unit
tAVAV tRC Read Cycle Time (Note 1) Min 45 50 55 70 90 120 ns
CE# = VIL
tAVQV tACC Address to Output Delay Max 45 50 55 70 90 120 ns
OE# = VIL
tELQV tCE Chip Enable to Output Delay OE# = VIL Max 45 50 55 70 90 120 ns
Output Enable to Output Delay
tGLQV tOE Max 30 30 30 30 35 50 ns
(Note 1)
Chip Enable to Output High Z
tEHQZ tDF Max 20 20 20 20 20 30 ns
(Note 1)
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